TY  - BOOK
AU  -  Padmanabhan T R; Tripurasundari, Bala B
TI  -  Design through Verilog HDL
SN  - 1796
U1  -  621.392  PAT-D 
PB  -  Wiley India(P) Ltd., New Delhi
KW  -  Hardware description language; system analysis and design
ER  -